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Power Management Switch IC Series for PCs and Digital Consumer Product
2ch Small Current Output USB High Side Switch ICs
BD2046AFJ, BD2056AFJ
No.09029JAT05
Description High side switch for USB is a high side switch having over current protection used in power supply line of universal serial bus (USB). Its switch unit has two channels of N-channel power MOSFET. And, over current detection circuit, thermal shutdown circuit, under voltage lockout and soft start circuit are built in. Features 1) Dual N-MOS high side switch 2) Continuous current load 0.25A 3) Control input logic Active-Low : BD2046AFJ Active-High : BD2056AFJ 4) Soft start circuit 5) Over current detection 6) Thermal shutdown 7) Under voltage lockout 8) Open drain error flag output 9) Reverse-current protection when switch off 10) Flag output delay filter built in Applications USB hub in consumer appliances, Car accessory, PC, PC peripheral equipment, and so forth Lineup Parameter Continuous current load (A) Over current detection (A) Control input logic Absolute Maximum Ratings Parameter Supply voltage Enable voltage /OC voltage /OC current OUT voltage Storage temperature Power dissipation
*1 *
BD2046AFJ 0.25 0.5 Low
BD2056AFJ 0.25 0.5 High
Symbol VIN VEN, V/EN V/OC IS/OC VOUT TSTG Pd
Limits -0.3 to 6.0 -0.3 to 6.0 -0.3 to 6.0 10 -0.3 to 6.0 -55 to 150 560*1
Unit V V V mA V C mW
In the case of exceeding Ta = 25C, 4.48mW should be reduced per 1C. This chip is not designed to protect itself against radioactive rays.
Operating conditions Parameter Operating voltage Operating temperature Continuous output current
Symbol VIN TOPR ILO
Limits 2.7 to 5.5 -40 to 85 0 to 250
Unit V C mA
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1/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Electrical characteristics BD2046AFJ (Unless otherwise specified, VIN = 5.0V, Ta = 25C) Limits Parameter Symbol Min. Typ. Max. Operating Current Standby Current /EN input voltage /EN input current /OC output LOW voltage /OC output leak current ON resistance Output current at short Output rise time Output turn on time Output fall time Output turn off time UVLO threshold IDD ISTB V/EN I/EN V/OC IL/OC RON ISC TON1 TON2 TOFF1 TOFF2 VTUVH VTUVL 2.0 -1.0 0.3 2.1 2.0 110 0.01 0.01 0.01 100 0.5 1.8 2.1 1 3 2.3 2.2 140 1 0.8 0.4 1.0 0.5 1 130 0.7 10 20 20 40 2.5 2.4
Technical Note
Unit A A V V V A V A m A ms ms s s V V Increasing VIN Decreasing VIN
Condition V/EN = 0V, OUT = OPEN V/EN = 5V, OUT = OPEN High input Low input Low input 2.7V VIN 4.5V V/EN = 0V or V/EN = 5V I/OC = 5mA V/OC = 5V IOUT = 250mA VIN = 5V, VOUT = 0V, CL = 100F (RMS)
RL = 20 , CL = OPEN
BD2056AFJ
(Unless otherwise specified, VIN = 5.0V, Ta = 25C) Limits Parameter Symbol Min. Typ. Max. IDD ISTB VEN IEN V/OC IL/OC RON ISC TON1 TON2 TOFF1 TOFF2 VTUVH VTUVL 2.0 -1.0 0.3 2.1 2.0 110 0.01 0.01 0.01 100 0.5 1.8 2.1 1 3 2.3 2.2 140 1 0.8 0.4 1.0 0.5 1 130 0.7 10 20 20 40 2.5 2.4
Unit A A V V V A V A m A ms ms s s V V Increasing VIN Decreasing VIN
Condition VEN = 5V , OUT = OPEN VEN = 0V , OUT = OPEN High input Low input Low input 2.7V VIN 4.5V VEN = 0V or VEN = 5V I/OC = 5mA V/OC = 5V IOUT = 250mA VIN = 5V , VOUT = 0V, CL = 100F (RMS)
Operating Current Standby Current /EN input voltage /EN input current /OC output LOW voltage /OC output leak current ON resistance Output current at short Output rise time Output turn on time Output fall time Output turn off time UVLO threshold
RL = 20 , CL = OPEN
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2/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Measurement circuit
VDD 1F GND IN VEN VEN EN1 EN2 /OC1 OUT1 OUT2 /OC2
Technical Note
VDD
1F GND IN /OC1 OUT1 RL CL OUT2 RL CL /OC2
A
VEN VEN
EN1 EN2
Operating current
VDD 10k /OC1 OUT1 OUT2 /OC2 IOUT IOUT 10k
EN, /EN input voltage, Output rise, fall time
VDD VDD 1F GND IN VEN VEN EN1 EN2 IOUT /OC1 OUT1 OUT2 /OC2 IOUT
1F GND IN
VEN VEN
EN1 EN2
ON resistance, Over current detection Fig.1 Measurement circuit
OC output LOW voltage
Timing diagram BD2046AFJ
TOFF1 TON1 VOUT 10% TON2 90% 90% VOUT 10% 10% TON2 TON1 90% 90%
BD2056AFJ
TOFF1
10%
TOFF2
TOFF2
VEN
50%
50%
VCTRL
50%
50%
Fig.2 Timing diagram
Fig.3 Timing diagram
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3/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Reference data
140 OPERATING CURRENT : IDD [uA] 120 100 80 60 40 20 0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6 Ta=25C
140 120 OPERATING CURRENT : IDD [uA] 100 80 60 40 20 0 -50 1.0
Technical Note
VIN=5.0V
OPERATING CURRENT : ISTB [uA] 0 50 100 AMBIENT TEMPERATURE : Ta[] 0.8
Ta=25C
0.6 0.4
0.2
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
Fig.4 Operating current EN,/EN Enable
Fig.5 Operating current EN,/EN Enable
Fig.6 Operating current EN,/EN Disable
1.0 VIN=5.0V OPERATING CURRENT : ISTB [uA] 0.8
ENABLE INPUT VOLTAGE : VEN, V /EN[V] 0
2.0
2.0 ENABLE INPUT VOLTAGE : VEN, V/EN[V]
Ta=25C
1.5
VIN=5.0V Low to High High to Low
1.5
0.6 0.4
Low to High
1.0
High to Low
1.0
0.2
0.5
0.5
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Fig.7 Operating current EN,/EN Disable
0.5 /OC OUTPUT LOW VOLTAGE : V/OC[V]
/OC OUTPUT LOW VOLTAGE : V/OC[V] 0.5
Fig.8 EN,/EN input voltage
Fig.9 EN,/EN input voltage
200
Ta=25C 0.4 0.3
VIN=5.0V
0.4 ON RESISTANCE : R ON[m] 150
Ta=25C
0.3 0.2
100
0.2 0.1
0.1 0.0
50
0.0 2 3 4 5 SUPPLY VOLTAGE : VDD[V] 6
-50
0 50 100 AMBIENT TEMPERATURE : Ta[]
0 2 3 4 5 SUPPLY VOLTAGE : VDD[V] 6
Fig.10 /OC output LOW voltage
Fig.11 /OC output LOW voltage
Fig. ON resistance
200
2.0
2.0 SHORT CIRCUIT CURRENT : ISC[A]
VIN=5.0V
SHORT CIRCUIT CURRENT : ISC[A] ON RESISTANCE : R ON [m] 150 1.5
Ta=25C
VIN=5.0V
1.5
100
1.0
1.0
50
0.5
0.5
0 -50
0.0 0 50 100 AMBIENT TEMPERATURE : Ta[] 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Fig.13 ON resistance
Fig.14 Output current at shortcircuit
Fig.15 Output current at short circuit
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4/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Technical Note
5.0
5.0 Ta=25C VIN=5.0V 4.0
TURN ON TIME : TON2 [ms]
5.0
Ta=25C
4.0
4.0
RISE TIME : T ON1 [ms]
RISE TIME : T ON1 [ms]
3.0 2.0
3.0 2.0
3.0
2.0
1.0
1.0
1.0
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
0.0 -50
0.0
0 50 100 AMBIENT TEMPERATURE : Ta[]
2
3 4 5 SUPPLY VOLTAGE : VIN[V]
6
Fig.16 Output rise time
Fig.17 Output rise time
Fig.18 Output turn on time
5.0
VIN=5.0V
5.0
5.0
Ta=25C
4.0 FALL TIME : T OFF1[us] FALL TIME : T OFF1[us] 4.0 3.0
VIN=5.0V
4.0 TURN ON TIME : TON2 [ms] 3.0
3.0 2.0
2.0 1.0 0.0 -50
2.0 1.0
1.0
0.0
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
0
50
100
AMBIENT TEMPERATURE : Ta[]
Fig.19 Output turn on time
Fig.20 Output fall time
Fig.21 Output fall time
6.0 5.0 TURN OFF TIME : TOFF2 [us] 4.0 3.0 2.0 1.0 0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6 Ta=25C
5.0 UVLO THRESHOLD VOLTAGE : VUVLOH , VUVLOL [V]
2.5
VIN=5.0V
4.0 TURN OFF TIME : TOFF2 [us]
2.4
VUVLOH
2.3
3.0 2.0
2.2 2.1
VUVLOL
1.0
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
2.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Fig.22 Output turn off time
Fig.23 Output turn off time
Fig.24 UVLO threshold voltage
1.0 0.8 0.6 0.4 0.2 0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
UVLO HYSTERESIS VOLTAGE : VHYS[V]
Fig.25 UVLO hysteresis voltage
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5/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Waveform data
V/EN (5V/div.) V/OC (5V/div.) VOUT (5V/div.) V/EN (5V/div.) V/OC (5V/div.) VOUT (5V/div.) VIN=5V RL=10 CL=100uF V/EN (1V/div.)
Technical Note
V/OC (1V/div.)
VIN=5V RL=20 CL=200F
VIN=5V RL=10 CL=100uF IOUT (0.5A/div.) IOUT (0.1A/div.) TIME(1ms/div.) CL=100 CL=47F
CL=147F
IOUT (0.5A/div.) TIME(1ms/div.)
TIME(500us/div.)
Fig.26 Output rise characteristic (BD2056AFJ)
Fig.27 Output fall characteristic (BD2056AFJ)
Fig.28 Inrush current response (BD2056AFJ)
V/OC (5V/div.)
V/OC (5V/div.) VOUT (5V/div.)
VOUT (5V/div.)
VIN=5V VIN=5V IOUT (0.5A/div.) TIME(20ms/div.) TIME(2ms/div.)
IOUT (0.5A/div.)
Fig.29 Over current response Ramped load (BD2056AFJ)
V/EN (5V/div.) V/OC (5V/div.) VOUT (5V/div.) V/OC (1V/div.)
Fig.30 Over current response Ramped load (BD2056AFJ)
VIN=2.5V CL=100uF V/OC (5V/div.)
VOUT (5V/div.)
VOUT (1V/div.) VIN=5V CL=100uF
VIN=5V CL=100uF Thermal Shutdown
IOUT (0.5A/div.) TIME (2ms/div.)
IOUT (0.5A/div.) TIME (1ms/div.)
IOUT (0.5A/div.) TIME (500ms/div.)
Fig.31 Over current response Enable to short circuit (BD2056AFJ)
V/OC (5V/div.)
Fig.32 Over current response Enable to short circuit (BD2056AFJ)
V/OC (5V/div.)
Fig.33 Over current response Enable to short circuit (BD2056AFJ)
VOUT (5V/div.)
VOUT (5V/div.)
IOUT (0.5A/div.) V/OC (5V/div.)
IOUT (0.5A/div.)
RL=20 CL=100uF TIME (1s/div.)
V/OC (5V/div.)
RL=20 CL=100uF TIME (1s/div.)
Fig.34 UVLO response Increasing VIN (BD2056AFJ)
Fig.35 UVLO response Decreasing VIN (BD2056AFJ)
Regarding the output rise/fall and over current detection characteristics of BD2046AFJ, refer to the characteristic of BD2056AFJ.
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6/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Block diagram
/EN1 EN1 Gate Logic1 OCD1 TSD1 /OC1 Delay
Technical Note
Charge Pump1
IN UVLO /EN2 EN2 OCD2 Gate Logic2 GND TSD2 Charge Pump2
OUT1
GND 1 IN 2 /EN1 3 (EN1) /EN2 4 (EN2) Top View
8 /OC1 7 OUT1 6 OUT2 5 /OC2
OUT2
/OC2 Delay
Fig.36 Block diagram
Fig.37 Pin Configuration
Pin description BD2046AFJ Pin No. 1 2 3, 4 5, 8 6, 7 BD2056AFJ Pin No. 1 2 3, 4 5, 8 6, 7
Symbol GND IN /EN /OC OUT
I/O I I I O O Ground.
Pin function
Power supply input. Input terminal to the switch and power supply input terminal of the internal circuit. Enable input. Switch on at Low level. High level input > 2.0V, Low level input < 0.8V. Error flag output. Low at over current, thermal shutdown. Open drain output. Switch output.
Symbol GND IN EN /OC OUT
I/O I I I O O Ground.
Pin function
Power supply input. Input terminal to the switch and power supply input terminal of the internal circuit. Enable input. Switch on at High level. High level input > 2.0V, Low level input < 0.8V Error flag output. Low at over current, thermal shutdown. Open drain output. Switch output.
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7/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
I/O circuit Symbol Pin No Equivalent circuit
Technical Note
EN1(/EN1) EN2(/EN2)
/EN1(EN1) /EN2(EN2)
3, 4
/OC1 /OC2
/OC1 /OC2
5, 8
OUT1 OUT2
6, 7
OUT1 OUT2
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8/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Technical Note
Functional description 1. Switch operation IN terminal and OUT terminal are connected to the drain and the source of switch MOSFET respectively. And the IN terminal is used also as power source input to internal control circuit.
When the switch is turned on from EN/EN control input, IN terminal and OUT terminal are connected by a 100m switch. In on status, the switch is bidirectional. Therefore, when the potential of OUT terminal is higher than that of IN terminal, current flows from OUT terminal to IN terminal. Since a parasitic diode between the drain and the source of switch MOSFET is canceled, in the off status, it is possible to prevent current from flowing reversely from OUT to IN. 2. Thermal shutdown circuit (TSD) Thermal shut down circuit have dual thermal shutdown threshold. Since thermal shutdown works at a lower junction temperature when an overcurrent occurs, only the switch of an overcurrent state become off and error flag is output. Thermal shut down action has hysteresis. Therefore, when the junction temperature goes down, switch on and error flag output automatically recover. However, until cause of junction temperature increase such as output shortcircuit is removed or the switch is turned off, thermal shut down detection and recovery are repeated. The thermal shut down circuit works when the switch of either OUT1 or OUT2 is on (EN,/EN signal is active). 3. Over current detection (OCD) The over current detection circuit limits current (ISC) and outputs error flag (/OC) when current flowing in each switch MOSFET exceeds a specified value. There are three types of response against over current. The over current detection circuit works when the switch is on (EN,/EN signal is active). 3-1. When the switch is turned on while the output is in shortcircuit status When the switch is turned on while the output is in shortcircuit status or so, the switch gets in current limit status soon. 3-2. When the output shortcircuits while the switch is on When the output shortcircuits or large capacity is connected while the switch is on, very large current flows until the over current limit circuit reacts. When the current detection, limit circuit works, current limitation is carried out. 3-3. When the output current increases gradually When the output current increases gradually, current limitation does not work until the output current exceeds the over current detection value. When it exceeds the detection value, current limitation is carried out. 4. Under voltage lockout (UVLO) UVLO circuit prevents the switch from turning on until the VIN exceeds 2.3V(Typ.). If the VIN drops below 2.2V(Typ.) while the switch turns on, then UVLO shuts off the switch. UVLO has hysteresis of a 100mV(Typ). Under voltage lockout circuit works when the switch of either OUT1 or OUT2 is on (EN,/EN signal is active). 5. Error flag (/OC) output Error flag output is N-MOS open drain output. At detection of over current, thermal shutdown, low level is output. Over current detection has delay filter. This delay filter prevents instantaneous current detection such as inrush current at switch on, hot plug from being informed to outside.
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9/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Technical Note
V/EN VOUT Output shortcircuit Thermal shut down IOUT V/OC delay Fig.38 Over current detection, thermal shutdown timing (BD2046AFJ)
VEN VOUT Output shortcircuit Thermal shut down IOUT V/OC delay Fig.39 Over current detection, thermal shutdown timing (BD2056AFJ)
Typical application circuit
5V(Typ) 10k~100k 10k~100k VBUS D+ OC DGND Regulator OC ON/OFF Data USB Controller Data CIN IN /EN1 (EN1) /EN2 (EN2) OUT1 OUT2 Data /OC2 CL Ferrite Beads CL
IN
OUT
ON/OFF
GND
/OC1
BD2046AFJ/56AFJ
Fig.40 Typical application circuit
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10/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Technical Note
Application information When excessive current flows owing to output shortcircuit or so, ringing occurs by inductance of power source line to IC, and may cause bad influences upon IC actions. In order to avoid this case, connect a bypath capacitor by IN terminal and GND terminal of IC. 1uF or higher is recommended.
Pull up /OC output by resistance 10k ~ 100k. Set up value which satisfies the application as CL and Ferrite Beads. This system connection diagram doesn't guarantee operating as the application. The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account external parts or dispersion of IC including not only static characteristics but also transient characteristics. This system connection diagram doesn't guarantee operating as the application. The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account external parts or dispersion of IC including not only static characteristics but also transient characteristics.
Power dissipation character (SOP-J8)
600
500
POWER DISSIPATION: Pd[mW]
400
300
200
100
0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta []
Fig.41 Power dissipation curve (Pd-Ta Curve)
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11/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Technical Note
Notes for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
(2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC's power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (12) Thermal shutdown circuit (TSD) When junction temperatures become detected temperatures or higher, the thermal shutdown circuit operates and turns a switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible, is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit operating or use the LSI assuming its operation. (13) Thermal design Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual states of use.
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12/13
2009.05 - Rev.A
BD2046AFJ, BD2056AFJ
Ordering part number
Technical Note
B
D
2
Part No. 2046A 2056A
0
4
6
A
F
J
-
E
2
Part No.
Package FJ: SOP-J8
Packaging and forming specification E2: Embossed tape and reel (SOP-J8)
SOP-J8
4.90.2 (MAX 5.25 include BURR) +6 4 -4
8 7 6 5

Tape Quantity
0.45MIN
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.00.3
3.90.2
Direction of feed
( reel on the left hand and you pull out the tape on the right hand
)
1
2
3
4
0.545 S
0.20.1
1.3750.1
0.175
1.27 0.420.1 0.1 S
1pin (Unit : mm) Reel
Direction of feed
Order quantity needs to be multiple of the minimum quantity.
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13/13
2009.05 - Rev.A
Notice
Notes
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